128 bit values, can I ...

[Mike Sherwin]

Can I put the move bits for a knight or a king in a 128 bit constant as though the N or K was at bit 64 and then shift the bits up by the from square (0-63) to get the possible moves for the piece? And if it can be done what would be the C++ code?

Edit: probably not because figuring out wich bits should fall off the board would be too expensive.

[hgm]

Do CPUs have shift instructions for 128-bit quantities, nowadays? They used to be all SIMD.

[Witek]

Unfortunately there's no instruction to do variable shift of 128-bit register. There's _mm_sllv_epi64 or _mm_slli_si128, but no _mm_sllv_si128 or something like that...

[JohnWoe]

I think they can be (128bit) emulated by structs/arrays (or 2 x 64b) and then overload bit operators & / | ... in C++. Gonna be total mess...
Will be much slower than 64b. No need for in 8x8 chess?
In 8x8 it's unnecessary. In Havoc which is 10x8 I use simple arrays. No need for sliders bitboards.

[dangi12012]

Can be done in 2 instructions. (Meaning you can write complicated code that compiles into 2 instructions)
https://stackoverflow.com/questions/599 ... bit-number

I dont understand how that would work tho - if you put the full bb of attack into the upper 64 bits and shift them down how would that give you the correct result? Meaning on the edges of the board you would still have wrapping issues.

Except if you are aiming for for a 0x88 board but in bitboard 128bits. That sounds like a novel idea actually - but you would need to "parallel bit extract" the board any time you want to use the actual 64bits of the board.

Thinking of this - I dont think this has been done yet. Sounds cool.

[dangi12012]

"Off the board test" or 0x88 would be this:
uint128_t off_board = "0x00FF00FF00FF00FF00FF00FF00FF00FF";

and then you can literally shift however you want and cast away everything not on the board.
I wonder if Bitrotation Slider lookup or Hyperbola Quintessence would still work in 128bits.
Warrants some research

2 Branchless instructions on 128bits would still be many times faster than calculated array access like for mailslot.
Dumb7 fill would not need to check for wrap making code easier to read (but two instructions per shift and add keep in mind)

[Mike Sherwin]

"Off the board test" or 0x88 would be this:
uint128_t off_board = "0x00FF00FF00FF00FF00FF00FF00FF00FF";

and then you can literally shift however you want and cast away everything not on the board.
I wonder if Bitrotation Slider lookup or Hyperbola Quintessence would still work in 128bits.
Warrants some research

2 Branchless instructions on 128bits would still be many times faster than calculated array access like for mailslot.
Dumb7 fill would not need to check for wrap making code easier to read (but two instructions per shift and add keep in mind)

0x88 was going to be my next question. I can also envision the sliders being shifted into place and using pext to gather the relevant bits. My only reason is to get rid of the lookup. But I don't even know if pext can work on 128 bits. And one lookup replaced by several instructions is probably too slow.

[hgm]

There are SIMD instructions that consider a large word as a vector of non-communicating bytes, right? When you would apply a shift to such a data type it would automatically clip off everything that is pushed over the edge. It is just that you would have to do the rank-shift and file-shift separately.

The rank-shift would just juggle the various bytes in the word. Since you would have to load the start pattern from memory at some point, you would not even need a real shift for that: you could just do a non-aligned memory access, offsetted by the number of ranks you want to shift.

[dangi12012]

There are SIMD instructions that consider a large word as a vector of non-communicating bytes, right? When you would apply a shift to such a data type it would automatically clip off everything that is pushed over the edge. It is just that you would have to do the rank-shift and file-shift separately.

The rank-shift would just juggle the various bytes in the word. Since you would have to load the start pattern from memory at some point, you would not even need a real shift for that: you could just do a non-aligned memory access, offsetted by the number of ranks you want to shift.

You dont need explicit simd - 4x32bit and 2x64bit solutions compile to very efficient code. (Also simd can consider the register as 8x16bit, 4x32bit or 2x64bit)
Looking this up I am now very confused. MSVC does not support any 128bit integer type yet they have the intrinsic for __shiftleft128
https://learn.microsoft.com/en-us/cpp/i ... w=msvc-170
Even in the example they are using two 64 bit integers for that.

[hgm]

I haven't closely followed CPU developments. But very often CPUs have occasional double precision instructions that use pairs if registers of their native length. E.g. for the result of a multiplication, or the dividend of a division. I could very well imagine there also are such double-register shift and rotate instructions.