Compiling question?

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Guenther
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Compiling question?

Post by Guenther »

Does bmi2 really always include avx2 instructions, I think I have read this somewhere recently?
Also someone complained a while ago, because my bmi2 (named) was slower than before (I had not included avx2).

My thinking was that avx2 came much later than bmi2, at least I thought so.
So I need to know, if bmi2/avx2 are always both available, or are there still cases, when one of both is excluded on some hardware?
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AndrewGrant
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Re: Compiling question?

Post by AndrewGrant »

Guenther wrote: Tue Mar 23, 2021 9:46 am Does bmi2 really always include avx2 instructions, I think I have read this somewhere recently?
Also someone complained a while ago, because my bmi2 (named) was slower than before (I had not included avx2).

My thinking was that avx2 came much later than bmi2, at least I thought so.
So I need to know, if bmi2/avx2 are always both available, or are there still cases, when one of both is excluded on some hardware?
-mavx2 and -mbmi2 are separate. Their instruction sets do not overlap in any sense of the word.

Ryzens have both AVX2 and BMI2, although the current generations (1xxx, 2xxx(?), 3xxx) have terrible support for PEXT/PDEP, which are two of the eight instructions in the set, and are the ones most likely to be explicitly used by an engine. In theory, a BMI2 compile on a Ryzen machine, where no PEXT/PDEP are generated, would be faster than without.

BMI2 is supported by: Haswell, Skylake, Broadwell, Excavtor, and Zen, Zen+
AVX2 is supported by: Haswell, Skylake, Broadwell, Kaby Lake, Coffee Lake, Cannon Lake, Cascade Lake, Ice Lake, Comet Lake, Tiger Lake, Rocket Lake, Alder Lake, Gracemont, Excavator, Zen, Zen+

So based on Wikipedia, any Intel or AMD machine with BMI2 support will also have AVX2 support. I would say that AVX2 implies BMI2 support as well, because the only difference in my two lists are very unusual CPU names I have not heard of. Wiki says that VIA CPUs support AVX2, but there is no mention of BMI2. However, no one owns a VIA.
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Guenther
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Re: Compiling question?

Post by Guenther »

AndrewGrant wrote: Tue Mar 23, 2021 9:56 am
Guenther wrote: Tue Mar 23, 2021 9:46 am Does bmi2 really always include avx2 instructions, I think I have read this somewhere recently?
Also someone complained a while ago, because my bmi2 (named) was slower than before (I had not included avx2).

My thinking was that avx2 came much later than bmi2, at least I thought so.
So I need to know, if bmi2/avx2 are always both available, or are there still cases, when one of both is excluded on some hardware?
-mavx2 and -mbmi2 are separate. Their instruction sets do not overlap in any sense of the word.

Ryzens have both AVX2 and BMI2, although the current generations (1xxx, 2xxx(?), 3xxx) have terrible support for PEXT/PDEP, which are two of the eight instructions in the set, and are the ones most likely to be explicitly used by an engine. In theory, a BMI2 compile on a Ryzen machine, where no PEXT/PDEP are generated, would be faster than without.

BMI2 is supported by: Haswell, Skylake, Broadwell, Excavtor, and Zen, Zen+
AVX2 is supported by: Haswell, Skylake, Broadwell, Kaby Lake, Coffee Lake, Cannon Lake, Cascade Lake, Ice Lake, Comet Lake, Tiger Lake, Rocket Lake, Alder Lake, Gracemont, Excavator, Zen, Zen+

So based on Wikipedia, any Intel or AMD machine with BMI2 support will also have AVX2 support. I would say that AVX2 implies BMI2 support as well, because the only difference in my two lists are very unusual CPU names I have not heard of. Wiki says that VIA CPUs support AVX2, but there is no mention of BMI2. However, no one owns a VIA.
Well it seems there was a missunderstanding (seems I wasn't precise enough), I do know that they don't overlap, I just wanted to know if both sets are always available usually on the same hardware.
Your post seems to imply that any machine that has bmi2 alo has avx2, but it is not completely clear, if vice versa is true too, is that correct?
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AndrewGrant
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Re: Compiling question?

Post by AndrewGrant »

Guenther wrote: Tue Mar 23, 2021 10:10 am
AndrewGrant wrote: Tue Mar 23, 2021 9:56 am
Guenther wrote: Tue Mar 23, 2021 9:46 am Does bmi2 really always include avx2 instructions, I think I have read this somewhere recently?
Also someone complained a while ago, because my bmi2 (named) was slower than before (I had not included avx2).

My thinking was that avx2 came much later than bmi2, at least I thought so.
So I need to know, if bmi2/avx2 are always both available, or are there still cases, when one of both is excluded on some hardware?
-mavx2 and -mbmi2 are separate. Their instruction sets do not overlap in any sense of the word.

Ryzens have both AVX2 and BMI2, although the current generations (1xxx, 2xxx(?), 3xxx) have terrible support for PEXT/PDEP, which are two of the eight instructions in the set, and are the ones most likely to be explicitly used by an engine. In theory, a BMI2 compile on a Ryzen machine, where no PEXT/PDEP are generated, would be faster than without.

BMI2 is supported by: Haswell, Skylake, Broadwell, Excavtor, and Zen, Zen+
AVX2 is supported by: Haswell, Skylake, Broadwell, Kaby Lake, Coffee Lake, Cannon Lake, Cascade Lake, Ice Lake, Comet Lake, Tiger Lake, Rocket Lake, Alder Lake, Gracemont, Excavator, Zen, Zen+

So based on Wikipedia, any Intel or AMD machine with BMI2 support will also have AVX2 support. I would say that AVX2 implies BMI2 support as well, because the only difference in my two lists are very unusual CPU names I have not heard of. Wiki says that VIA CPUs support AVX2, but there is no mention of BMI2. However, no one owns a VIA.
Well it seems there was a missunderstanding (seems I wasn't precise enough), I do know that they don't overlap, I just wanted to know if both sets are always available usually on the same hardware.
Your post seems to imply that any machine that has bmi2 alo has avx2, but it is not completely clear, if vice versa is true too, is that correct?
It appears to me that BMI2 implies AVX2, and AVX2 implies BMI2 on AMD.

For Intel, I think this is also true based on my listing, but I had never heard of (Coffee, Cannon, Cascade, ... Rocket, Alder)-Lake CPUs. So perhaps not true entirely.
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Guenther
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Re: Compiling question?

Post by Guenther »

AndrewGrant wrote: Tue Mar 23, 2021 10:44 am
It appears to me that BMI2 implies AVX2, and AVX2 implies BMI2 on AMD.

For Intel, I think this is also true based on my listing, but I had never heard of (Coffee, Cannon, Cascade, ... Rocket, Alder)-Lake CPUs. So perhaps not true entirely.
Thanks Andrew, I will then go out from the safest assumption, that won't hurt :)
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odomobo
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Re: Compiling question?

Post by odomobo »

The different -lake cpus are the manufacturing names for the modern intel CPU generations. To corroborate Andrew, it appears both instruction sets were released around the time of haswell, so what I see is that any chip from amd/intel in the past 7 years should support both (with the exception of AMD PDEP/PEXT performance through Zen2, of course).

In practice, modern CPUs should support both. In theory, weird CPUs might have just one, but that's probably not worth worrying about too much.

Off topic, but do any engines dynamically check the CPU at startup and pick an optimal build based on that? Sounds like a pain to implement, but it would be user-friendly.
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Re: Compiling question?

Post by Sesse »

AndrewGrant wrote: Tue Mar 23, 2021 9:56 am Ryzens have both AVX2 and BMI2, although the current generations (1xxx, 2xxx(?), 3xxx) have terrible support for PEXT/PDEP, which are two of the eight instructions in the set, and are the ones most likely to be explicitly used by an engine.
The current generation Ryzen is 5xxx (Zen 3), which has fast PEXT/PDEP.