Stockfish 2.2.2 JA update available

[Master Om]

Stockfish 2.2.2 JA (UCI)
http://www.stockfishchess.com/
by Tord Romstad, Marco Costalba & Joona Kiiski. (Stockfish Team)

Windows/Linux/Android 64/32

Changes:
64 bit windows compiles built with GCC instead of Intel - 5-6% speed increase.
Code changes are very little: it should be a bit faster & a bug is fixed where SF in some
(rare) positions erroneously moves immediately without thinking, as it should do.


Available my homepage & from Stockfish website shortly.

Jim.

Jim
The 2.2.2 SSE4.2 version is crashing Immediately after clicking in in my AMD X6 1090T. What to do ?

[Graham Banks]

Stockfish 2.2.2 JA (UCI)
http://www.stockfishchess.com/
by Tord Romstad, Marco Costalba & Joona Kiiski. (Stockfish Team)

Windows/Linux/Android 64/32

Changes:
64 bit windows compiles built with GCC instead of Intel - 5-6% speed increase.
Code changes are very little: it should be a bit faster & a bug is fixed where SF in some
(rare) positions erroneously moves immediately without thinking, as it should do.


Available my homepage & from Stockfish website shortly.

Jim.

For testing purposes, can 2.2.1 and 2.2.2 be combined?
Are the 32-bit compiles changed as well?

[rvida]

Jim
The 2.2.2 SSE4.2 version is crashing Immediately after clicking in in my AMD X6 1090T.

Same CPU here, and the same 'illegal operation'...

What to do ?

You have a few choices:

1. download the sources and compile it yourself
2. buy an Intel
3. revert back to 2.2.1 JA

[rvida]

the offending insruction is

Code: Select all

000000000041C3F0  pabsd       xmm2,xmm2

Context:

Code: Select all

000000000041C375  prefetchw   [rax+200h]  
000000000041C37C  mov         dword ptr [rsp+58h],r15d  
000000000041C381  mov         dword ptr [rsp+5Ch],ecx  
000000000041C385  prefetchw   [rax+210h]  
000000000041C38C  movd        xmm1,dword ptr [rsp+58h]  
000000000041C392  movd        xmm2,dword ptr [rsp+5Ch]  
000000000041C398  prefetchw   [rax+220h]  
000000000041C39F  prefetchw   [rax+230h]  
000000000041C3A6  prefetchw   [rax+240h]  
000000000041C3AD  prefetchw   [rax+250h]  
000000000041C3B4  pshufd      xmm0,xmm1,0  
000000000041C3B9  pshufd      xmm1,xmm2,0  
000000000041C3BE  prefetchw   [rax+260h]  
000000000041C3C5  prefetchw   [rax+270h]  
000000000041C3CC  prefetchw   [rax+280h]  
000000000041C3D3  prefetchw   [rax+290h]  
000000000041C3DA  movdqa      xmm2,xmm1  
000000000041C3DE  movdqa      xmm3,xmm0  
000000000041C3E2  psubd       xmm2,xmmword ptr [4DE560h]  
000000000041C3EA  psubd       xmm3,xmmword ptr [rsp+60h]  
000000000041C3F0  pabsd       xmm2,xmm2  
000000000041C3F5  pabsd       xmm3,xmm3  
000000000041C3FA  psubd       xmm1,xmmword ptr [4DE570h]  
000000000041C402  pabsd       xmm1,xmm1  
000000000041C407  prefetchw   [rax+2A0h]  
000000000041C40E  pmaxsd      xmm3,xmm2  
000000000041C413  movaps      xmmword ptr [rax],xmm3  
000000000041C416  movdqa      xmm3,xmm0  
000000000041C41A  psubd       xmm3,xmmword ptr [rsp+70h]  
000000000041C420  pabsd       xmm3,xmm3  
000000000041C425  prefetchw   [rax+2B0h]  
000000000041C42C  prefetchw   [rax+2C0h]  
000000000041C433  prefetchw   [rax+2D0h]  
000000000041C43A  prefetchw   [rax+2E0h]  
000000000041C441  pmaxsd      xmm3,xmm1  
000000000041C446  movaps      xmmword ptr [rax+10h],xmm3  
000000000041C44A  movdqa      xmm3,xmm0  
000000000041C44E  psubd       xmm3,xmm15  
000000000041C453  pabsd       xmm3,xmm3  
000000000041C458  prefetchw   [rax+2F0h]  
000000000041C45F  pmaxsd      xmm3,xmm2  
000000000041C464  movaps      xmmword ptr [rax+20h],xmm3  
000000000041C468  movdqa      xmm3,xmm0  
000000000041C46C  psubd       xmm3,xmm14  
000000000041C471  pabsd       xmm3,xmm3  
000000000041C476  pmaxsd      xmm3,xmm1  
000000000041C47B  movaps      xmmword ptr [rax+30h],xmm3  
000000000041C47F  movdqa      xmm3,xmm0  
000000000041C483  psubd       xmm3,xmm13  
000000000041C488  pabsd       xmm3,xmm3  
000000000041C48D  pmaxsd      xmm3,xmm2  
000000000041C492  movaps      xmmword ptr [rax+40h],xmm3  
000000000041C496  movdqa      xmm3,xmm0  
000000000041C49A  psubd       xmm3,xmm12  
000000000041C49F  pabsd       xmm3,xmm3  
000000000041C4A4  pmaxsd      xmm3,xmm1  
000000000041C4A9  movaps      xmmword ptr [rax+50h],xmm3  
000000000041C4AD  movdqa      xmm3,xmm0  
000000000041C4B1  psubd       xmm3,xmm11  
000000000041C4B6  pabsd       xmm3,xmm3  
000000000041C4BB  pmaxsd      xmm3,xmm2  
000000000041C4C0  movaps      xmmword ptr [rax+60h],xmm3  
000000000041C4C4  movdqa      xmm3,xmm0  
000000000041C4C8  psubd       xmm3,xmm10  
000000000041C4CD  pabsd       xmm3,xmm3  
000000000041C4D2  pmaxsd      xmm3,xmm1  
000000000041C4D7  movaps      xmmword ptr [rax+70h],xmm3  
000000000041C4DB  movdqa      xmm3,xmm0  
000000000041C4DF  psubd       xmm3,xmm9  
000000000041C4E4  pabsd       xmm3,xmm3  
000000000041C4E9  pmaxsd      xmm3,xmm2  
000000000041C4EE  movaps      xmmword ptr [rax+80h],xmm3  
000000000041C4F5  movdqa      xmm3,xmm0  
000000000041C4F9  psubd       xmm3,xmm8  
000000000041C4FE  pabsd       xmm3,xmm3  
000000000041C503  pmaxsd      xmm3,xmm1  
000000000041C508  movaps      xmmword ptr [rax+90h],xmm3  
000000000041C50F  movdqa      xmm3,xmm0  
000000000041C513  psubd       xmm3,xmm7  
000000000041C517  pabsd       xmm3,xmm3  
000000000041C51C  pmaxsd      xmm3,xmm2  
000000000041C521  movaps      xmmword ptr [rax+0A0h],xmm3  
000000000041C528  movdqa      xmm3,xmm0  
000000000041C52C  psubd       xmm3,xmm6  
000000000041C530  pabsd       xmm3,xmm3  
000000000041C535  pmaxsd      xmm3,xmm1  
000000000041C53A  movaps      xmmword ptr [rax+0B0h],xmm3  
000000000041C541  movdqa      xmm3,xmm0  
000000000041C545  psubd       xmm3,xmm5  
000000000041C549  pabsd       xmm3,xmm3  
000000000041C54E  pmaxsd      xmm3,xmm2  
000000000041C553  movaps      xmmword ptr [rax+0C0h],xmm3  
000000000041C55A  movdqa      xmm3,xmm0  
000000000041C55E  psubd       xmm3,xmm4  
000000000041C562  pabsd       xmm3,xmm3  
000000000041C567  pmaxsd      xmm3,xmm1  
000000000041C56C  movaps      xmmword ptr [rax+0D0h],xmm3  
000000000041C573  movdqa      xmm3,xmm0  
000000000041C577  psubd       xmm0,xmmword ptr [rsp+30h]  
000000000041C57D  psubd       xmm3,xmmword ptr [rsp+40h]  
000000000041C583  pabsd       xmm0,xmm0  
000000000041C588  pabsd       xmm3,xmm3  
000000000041C58D  pmaxsd      xmm0,xmm1  
000000000041C592  movaps      xmmword ptr [rax+0F0h],xmm0  
000000000041C599  pmaxsd      xmm3,xmm2  
000000000041C59E  movaps      xmmword ptr [rax+0E0h],xmm3

[lucasart]

I've just downloaded the latest source from github, and compiled it. Here's the result of a ./stockfish bench > /dev/null

Code: Select all

Total time (ms) : 6166
Nodes searched  : 5447426
Nodes/second    : 883461

I'm running an AMD duo core (I'm not sure which one, it's a laptop I bought a year ago). It works like a charm

Now Jim Ablett's compiles:
=> SSE 4: Illegal instruction. But if that's the case just use the normal (non SSE4) compile, and JA's compiles shoudl work for everyone
=> non SSE4: works fine but slightly slower

Code: Select all

Total time (ms) : 6369
Nodes searched  : 5447426
Nodes/second    : 855303

I'll never switch my laptop for an Intel. It's a laptop I bought a year ago, and it was almost the first price one. I wonder what others get on a ./stockfish bench run to compare. It is at least twice faster than my desktop Intel computer that I bought 2 years ago

Conclusion:
it's best to compile it yourself if you can, typically if you use Linux. But for those who find it too complicated (unfortunately it is a bit more complicated on Windows for eg), they should just use whichever of the 2 JA compiles that works for their machine (if SSE4 faile use the normal one)

[lucasart]

Note that this version defaults to one thread.

Thanks for the update.

Both the JA compile and the compile I did myself detect the number of CPU correctly

option name Threads type spin default 2 min 1 max 32

However the JA compile with SSE4 is essentially broken on AMD, so I can't use it. Is it a problem you have with the SSE4 compile ?

[Master Om]

Jim
The 2.2.2 SSE4.2 version is crashing Immediately after clicking in in my AMD X6 1090T.

Same CPU here, and the same 'illegal operation'...

What to do ?

You have a few choices:

1. download the sources and compile it yourself
2. buy an Intel
3. revert back to 2.2.1 JA

The top 2 is impossible , so sticking with the third

[gaard]

Both SSE4.2 and the standard 64-bit binaries default to 1 thread. The 32-bit version correctly defaults to 4.

For version 2.2.1, all versions default to 4.

I am not seeing any crashes. Running on an Intel i5.

[lucasart]

Both SSE4.2 and the standard 64-bit binaries default to 1 thread. The 32-bit version correctly defaults to 4.

For version 2.2.1, all versions default to 4.

I am not seeing any crashes. Running on an Intel i5.

interesting, so on my AMD laptop the JA compile or my compile both detect the number of CPU. But on yours the JA one doesn't. So the problem is probably not in the JA compile but in Stockfish. What operating system do you use ?

[gaard]

Win7. My own compiles all default to 4 with msvc. I'm guessing something didn't translate correctly with GCC.