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[John Hamlen]

Okay, I think I'm getting a bit more of a handle on things.

Here is the architecture of AMD's latest GCN architecture. This is used in its 7xxx series of GPUs, a big departure from their previous designs, and much more suited to "general purpose" computing. Previously this had been almost exclusively Nvidia's domain:
http://www.anandtech.com/show/4455/amds-graphics-core-next-preview-amd-architects-for-compute/4
Where GPUs are partitioned into Compute Units (CU's) of 64 ALUs which share:
256Kb register file => 4Kb each
16Kb "Data L1" => 0.25Kb each

With Nvidia's latest "Kepler" architecture - if I'm reading this correctly http://www.anandtech.com/show/5699/nvidia-geforce-gtx-680-review/2 - the GPUs are partitioned into SMX units of 192 Cores which share:
256Kb register file => 1.3Kb each
64Kb "Shared Mem/L1 Cache" => 0.3Kb each